Prosa Structured Analysis Tool

Prosa Structured Analysis Tool is a visual systems and software development environment which supports industry standard SA/SD/RT structured analysis and design with real-time extensions modeling method. Prosa supports data flow diagrams, state transition diagrams and entity relationship diagrams using Chen's and Bachmans ER notations. Prosa has integrated data dictionary.

Prosa actively guides the designer to create correct and consistent graphic diagrams. Prosa offers interactive checking between diagrams. Concurrent documentation integration ensures real-time link from design to documentation.

Prosa automates diagram creation and checking, and produces C++, C#, Java code headers and SQL DDL for implementation. Concurrent documentation ensures accurate documents which are consistent with the software design.

Prosa has integrations with programmer's workbenches, version control software, documentation tools and web pages.

Several designers can work concurrently in the same modeling project. The diagrams are locked so that only one designer is allowed to edit a diagram at a time. Standard security settings of the file system can be used to set designer specific read/write rights.

Prosa has an established and notable position in analysis and design tool business.[1][2] Prosa is used in areas like system and software development, telecommunications,[3] automation,[4] car manufacturing, machinery, banking, insurance, defense/military, research,[5] integrated circuit design,[6] etc.

Prosa is available for Microsoft Windows.

Versions

File format

Prosa stores diagrams in ASCII text format.

See also

References

  1. ↑ Oman, P.W. (1990). "CASE: analysis and design tools" In: Software, IEEE (Volume:7 , Issue: 3 ), May 1990, Pages 37 - 43.
  2. ↑ Alessandro Maccari, Claudio Riva. "On CASE tool usage at Nokia" In: Proceedings of the 17th IEEE International Conference Automated Software Engineering (ASE 2002), IEEE, Computer Society Press, September 23–27, 2002, Edinburgh, Scotland.
  3. ↑ J.M.A. Tanskanen. "Mobile communications system simulator development using structured analysis" (2001) in: Vehicular Technology Conference, 2001. VTC 2001 Fall. IEEE VTS 54th (Volume:4 ), Pages 2547–2551.
  4. ↑ J.-M. Hasemann, T. Heikkilä. "Monitorin g in Intelligent Autonomous Robots" (1993) In: Scandinavian Conference on Artificial Intelligence-93: Proceedings of the Fourth Scandinavian Conference on Artificial Intelligence Electrum, Stockholm, Sweden, May 4–7, 1993.
  5. ↑ Timo Juntunen, Jorma Kivelä, Auli Reinikka, Matti Sipola, Juha-Pekka Soininen, Kari Tiensyrjä, Tuomo Tikkanen. (1988). "Real-time structured analysis in system level design of embedded ASICs". In: Microprocessing and Microprogramming Volume 24, Issues 1–5, August 1988, Pages 449–454.
  6. ↑ Tuomo Tikkanen, Timo Leppänen, Jorma Kivelä. (1990). "Structured analysis and VHDL in embedded ASIC design and verification". In: IEEE Computer Society, Proceeding EURO-DAC '90 Proceedings of the conference on European design automation Pages 107–111.

External links

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